PIC18F87J10 Datasheet, PDF (83/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
6.0 PROGRAM MEMORY
For the PIC18F87J10 family of devices, the on-chip
program memory is implemented as read-only
memory. It is readable over the entire VDD range during
normal operation; it cannot be written to or erased.
Reads from program memory are executed one byte at
a time.
PIC18F8XJ10/8XJ15 (80-pin) devices also implement
the ability to read, write to and execute code from
external memory devices, using the external memory
bus. In this implementation, external memory is used
as an extension beyond the upper boundary of the
on-chip program memory space. The operation of the
physical interface is discussed in Section 7.0
“External Memory Bus”.
In all devices, a value written to the program memory
space does not need to be a valid instruction.
Executing a program memory location that forms an
invalid instruction results in a NOP.
6.1 Table Reads and Table Writes
To read and write to the program memory space, there
are two operations that allow the processor to move
bytes between the program memory space and the
data RAM: Table Read (TBLRD) and Table Write
(TBLWT).
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register (TABLAT).
Table read operations retrieve data from program
memory and place it into the data RAM space. Table
write operations place data from the data memory
space on the external data bus. The actual process of
writing the data to the particular memory device is
determined by the requirements of the device itself.
Figure 6-1 shows the table operations as they relate to
program memory and data RAM.
Table operations work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word-aligned. Therefore, a table block
can start and end at any byte address. If a table write is
being used to write executable code into an external
program memory, program instructions will need to be
word-aligned.
Note:
For 64-pin devices, if the TBLWT instruc-
tion is used to attempt a write to the
program memory space, it will have no
effect. Execution will take two instruction
cycles but effectively result in a NOP.
The TBLWT instruction is still available
during In-Circuit Serial Programming
(ICSP).
FIGURE 6-1:
TABLE READ AND TABLE WRITE OPERATIONS
Instruction: TBLRD*
Table Pointer⁽¹⁾
Program Memory Space
TBLPTRU TBLPTRH TBLPTRL
Data Memory Space
Table Latch (8-bit)
TABLAT
Instruction: TBLWT*
Table Pointer⁽¹⁾
TBLPTRU TBLPTRH TBLPTRL
Program Memory Space
Data Memory Space
Table Latch (8-bit)⁽²⁾
TABLAT
Note 1: Table Pointer register points to a byte in the program memory space.
2: Data is actually written to the memory location by the memory write algorithm. See Section 6.4 “Writing
to Program Memory Space (PIC18F8XJ10/8XJ15 Devices Only)” for more information.
 2005 Microchip Technology Inc.
Advance Information
DS39663A-page 81