PIC18F87J10 Datasheet, PDF (70/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
5.3.4 SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
more than the top half of Bank 15 (F60h to FFFh). A list
of these registers is given in Table 5-3 and Table 5-4.
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this
section. Registers related to the operation of the
peripheral features are described in the chapter for that
peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
TABLE 5-3: SPECIAL FUNCTION REGISTER MAP FOR PIC18F87J10 FAMILY DEVICES
Address
Name
Address
Name
Address
FFFh
FFEh
FFDh
FFCh
FFBh
TOSU
TOSH
TOSL
STKPTR
PCLATU
FDFh INDF2⁽¹⁾
FDEh POSTINC2⁽¹⁾
FDDh POSTDEC2⁽¹⁾
FDCh PREINC2⁽¹⁾
FDBh PLUSW2⁽¹⁾
FBFh
FBEh
FBDh
FBCh
FBBh
FFAh PCLATH
FDAh FSR2H
FBAh
FF9h
PCL
FD9h FSR2L
FB9h
FF8h TBLPTRU
FD8h STATUS
FB8h
FF7h TBLPTRH
FD7h TMR0H
FB7h
FF6h TBLPTRL
FD6h TMR0L
FB6h
FF5h
FF4h
TABLAT
PRODH
FD5h
FD4h
T0CON
—⁽²⁾
FB5h
FB4h
FF3h
FF2h
PRODL
INTCON
FD3h
FD2h
OSCCON
—⁽²⁾
FB3h
FB2h
FF1h INTCON2
FD1h WDTCON
FB1h
FF0h INTCON3
FEFh INDF0⁽¹⁾
FEEh POSTINC0⁽¹⁾
FEDh POSTDEC0⁽¹⁾
FECh PREINC0⁽¹⁾
FEBh PLUSW0⁽¹⁾
FD0h
FCFh
FCEh
FCDh
FCCh
FCBh
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
FB0h
FAFh
FAEh
FADh
FACh
FABh
FEAh FSR0H
FCAh T2CON
FAAh
FE9h FSR0L
FC9h SSP1BUF
FA9h
FE8h
FE7h
FE6h
FE5h
FE4h
FE3h
WREG
INDF1⁽¹⁾
POSTINC1⁽¹⁾
POSTDEC1⁽¹⁾
PREINC1⁽¹⁾
PLUSW1⁽¹⁾
FC8h
FC7h
FC6h
FC5h
FC4h
FC3h
SSP1ADD
SSP1STAT
SSP1CON1
SSP1CON2
ADRESH
ADRESL
FA8h
FA7h
FA6h
FA5h
FA4h
FA3h
FE2h FSR1H
FC2h ADCON0
FA2h
FE1h FSR1L
FC1h ADCON1
FA1h
FE0h
BSR
FC0h ADCON2
FA0h
Name
CCPR1H
CCPR1L
CCP1CON
CCPR2H
CCPR2L
CCP2CON
CCPR3H
CCPR3L
CCP3CON
ECCP1AS
CVRCON
CMCON
TMR3H
TMR3L
T3CON
PSPCON
SPBRG1
RCREG1
TXREG1
TXSTA1
RCSTA1
—⁽²⁾
—⁽²⁾
—⁽²⁾
—⁽²⁾
—⁽²⁾
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
Address Name Address Name
F9Fh
IPR1
F9Eh
PIR1
F9Dh
PIE1
F9Ch MEMCON⁽³⁾
F9Bh
F9Ah
F99h
OSCTUNE
TRISJ⁽³⁾
TRISH⁽³⁾
F98h TRISG
F97h TRISF
F96h TRISE
F95h TRISD
F94h TRISC
F93h TRISB
F92h
F91h
F90h
TRISA
LATJ⁽³⁾
LATH⁽³⁾
F8Fh LATG
F8Eh
LATF
F8Dh
LATE
F8Ch
LATD
F8Bh
LATC
F8Ah
LATB
F89h
F88h
F87h
LATA
PORTJ⁽³⁾
PORTH⁽³⁾
F86h PORTG
F85h PORTF
F84h PORTE
F83h PORTD
F82h PORTC
F81h PORTB
F80h PORTA
F7Fh SPBRGH1
F7Eh BAUDCON1
F7Dh SPBRGH2
F7Ch
F7Bh
F7Ah
BAUDCON2
—⁽²⁾
—⁽²⁾
F79h ECCP1DEL
F78h TMR4
F77h
PR4
F76h T4CON
F75h CCPR4H
F74h CCPR4L
F73h CCP4CON
F72h CCPR5H
F71h CCPR5L
F70h CCP5CON
F6Fh SPBRG2
F6Eh RCREG2
F6Dh TXREG2
F6Ch TXSTA2
F6Bh RCSTA2
F6Ah ECCP3AS
F69h ECCP3DEL
F68h ECCP2AS
F67h ECCP2DEL
F66h SSP2BUF
F65h SSP2ADD
F64h SSP2STAT
F63h SSP2CON1
F62h
F61h
F60h
SSP2CON2
—⁽²⁾
—⁽²⁾
Note 1:
2:
3:
This is not a physical register.
Unimplemented registers are read as ‘0’.
This register is not available on 64-pin devices.
DS39663A-page 68
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 2005 Microchip Technology Inc.