PIC18F87J10 Datasheet, PDF (355/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
FIGURE 26-4:
OSC1
CLKO AND I/O TIMING
Q4
Q1
10
CLKO
13
14
I/O pin
(Input)
17
I/O pin
(Output)
Old Value
Note:
20, 21
Refer to Figure 26-2 for load conditions.
Q2
Q3
11
19
18
12
16
15
New Value
TABLE 26-9: CLKO AND I/O TIMING REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ
Max Units Conditions
10
TOSH2CKL OSC1 ↑ to CLKO ↓
—
TBD
TBD
ns
11
TOSH2CKH OSC1 ↑ to CLKO ↑
—
TBD
TBD
ns
12
TCKR
CLKO Rise Time
—
TBD
TBD
ns
13
TCKF
CLKO Fall Time
—
TBD
TBD
ns
14
TCKL2IOV CLKO ↓ to Port Out Valid
—
— 0.5 TCY + 20 ns
15
TIOV2CKH Port In Valid before CLKO ↑
0.25 TCY + 25 —
—
ns
16
TCKH2IOI Port In Hold after CLKO ↑
0
—
—
ns
17
TOSH2IOV OSC1 ↑ (Q1 cycle) to Port Out Valid
—
50
150
ns
18
TOSH2IOI OSC1 ↑ (Q2 cycle) to Port Input Invalid
18A
(I/O in hold time)
100
—
—
ns
200
—
—
ns VDD = 2.0V
19
TIOV2OSH Port Input Valid to OSC1 ↑
(I/O in setup time)
0
—
—
ns
20
TIOR
Port Output Rise Time
—
10
25
ns
20A
—
—
60
ns VDD = 2.0V
21
TIOF
Port Output Fall Time
—
10
25
ns
21A
—
—
60
ns VDD = 2.0V
22† TINP
INT pin High or Low Time
TCY
—
—
ns
23† TRBP
RB7:RB4 Change INT High or Low Time
TCY
—
—
ns
Legend: TBD = To Be Determined
† These parameters are asynchronous events not related to any internal clock edges.
 2005 Microchip Technology Inc.
Advance Information
DS39663A-page 353