PIC18F87J10 Datasheet, PDF (276/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
23.3 On-Chip Voltage Regulator
All of the PIC18F87J10 family devices power their core
digital logic at a nominal 2.5V. This may create an issue
for designs that are required to operate at a higher
typical voltage, such as 3.3V. To simplify system
design, all devices in the PIC18F87J10 family incor-
porate an on-chip regulator that allows the device to
run its core logic from VDD.
The regulator is controlled by the ENVREG pin. Tying
VDD to the pin enables the regulator, which in turn, pro-
vides power to the core from the other VDD pins. When
the regulator is enabled, a low-ESR filter capacitor
must be connected to the VDDCORE/VCAP pin
(Figure 23-2). This helps to maintain the stability of the
regulator. The recommended value for the filer capaci-
tor is provided in Section 26.3 “DC Characteristics:
PIC18F87J10 Family (Industrial)”.
If ENVREG is tied to VSS, the regulator is disabled. In
this case, separate power for the core logic at a nomi-
nal 2.5V must be supplied to the device on the
VDDCORE/VCAP pin to run the I/O pins at higher voltage
levels, typically 3.3V. Alternatively, the VDDCORE/VCAP
and VDD pins can be tied together to operate at a lower
nominal voltage. Refer to Figure 23-2 for possible
configurations.
23.3.1 ON-CHIP REGULATOR AND BOR
When the on-chip regulator is enabled, PIC18F87J10
family devices also have a simple brown-out capability.
If the voltage supplied to the regulator is inadequate to
maintain a regulated level, the regulator Reset circuitry
will generate a BOR Reset. This event is captured by
the BOR flag bit (RCON<0>).
The operation of the BOR is described in more detail in
Section 4.4 “Brown-out Reset (BOR)” and
Section 4.4.1 “Detecting BOR”. The brown-out voltage
levels are specific in Section 26.1 “DC Characteristics:
Supply Voltage, PIC18F87J10 Family (Industrial)”.
23.3.2 POWER-UP REQUIREMENTS
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, VDDCORE must
never exceed VDD by 0.3 volts.
FIGURE 23-2:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
Regulator Enabled (ENVREG tied to VDD):
3.3V
PIC18FXXJ10/XXJ15
VDD
ENVREG
VDDCORE/VCAP
CF
VSS
Regulator Disabled (ENVREG tied to ground):
2.5V⁽¹⁾
3.3V⁽¹⁾
PIC18FXXJ10/XXJ15
VDD
ENVREG
VDDCORE/VCAP
VSS
Regulator Disabled (VDD tied to VDDCORE):
2.5V⁽¹⁾
PIC18FXXJ10/XXJ15
VDD
ENVREG
VDDCORE/VCAP
VSS
Note 1:
These are typical operating voltages. Refer
to Section 26.1 “DC Characteristics:
Supply Voltage” for the full operating
ranges of VDD and VDDCORE.
DS39663A-page 274
Advance Information
 2005 Microchip Technology Inc.