PIC18F87J10 Datasheet, PDF (361/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
FIGURE 26-11: EXAMPLE SPI™ MASTER MODE TIMING (CKE = 0)
SSx
SCKx
(CKP = 0)
SCKx
(CKP = 1)
70
71
72
78
79
SDOx
80
MSb
79
78
bit 6 - - - - - - 1
LSb
75, 76
SDIx
MSb In
bit 6 - - - - 1
74
73
Note: Refer to Figure 26-2 for load conditions.
LSb In
TABLE 26-16: EXAMPLE SPI™ MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
70
TSSL2SCH, SSx ↓ to SCKx ↓ or SCKx ↑ Input
TSSL2SCL
TCY
—
71
TSCH
71A
SCKx Input High Time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
72
TSCL
72A
SCKx Input Low Time
(Slave mode)
Continuous
Single Byte
1.25 TCY + 30 —
40
—
73
TDIV2SCH, Setup Time of SDIx Data Input to SCKx Edge
TDIV2SCL
100
—
73A TB2B
Last Clock Edge of Byte 1 to the 1st Clock Edge 1.5 TCY + 40 —
of Byte 2
74
TSCH2DIL, Hold Time of SDIx Data Input to SCKx Edge
TSCL2DIL
100
—
75
TDOR
SDOx Data Output Rise Time
—
25
76
TDOF
SDOx Data Output Fall Time
—
25
78
TSCR
SCKx Output Rise Time (Master mode)
—
25
79
TSCF
SCKx Output Fall Time (Master mode)
—
25
80
TSCH2DOV, SDOx Data Output Valid after SCKx Edge
TSCL2DOV
—
50
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
ns
ns
ns (Note 1)
ns
ns (Note 1)
ns
ns (Note 2)
ns
ns
ns
ns
ns
ns
 2005 Microchip Technology Inc.
Advance Information
DS39663A-page 359