PIC18F87J90 Datasheet, PDF (437/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
Operation During Sleep ............................................ 306
Compare (CCP Module) ................................................... 177
Capture, Compare, Timer1, Timers Associated
Registers........................................................... 178
CCP Pin Configuration.............................................. 177
CCPR2 Register ....................................................... 177
Software Interrupt ..................................................... 177
Special Event Trigger................................ 153, 177, 296
Timer1/Timer3 Mode Selection................................. 177
Computed GOTO ................................................................ 69
Configuration Bits.............................................................. 325
Configuration Mismatch (CM) ............................................. 55
Configuration Register Protection ..................................... 337
Core Features
Easy Migration .............................................................. 9
Extended Instruction Set............................................... 9
Memory Options............................................................ 9
nanoWatt Technology ................................................... 9
Oscillator Options and Features ................................... 9
CPFSEQ ........................................................................... 356
CPFSGT ........................................................................... 357
CPFSLT ............................................................................ 357
Crystal Oscillator/Ceramic Resonator ................................. 39
Customer Change Notification Service ............................. 445
Customer Notification Service........................................... 445
Customer Support ............................................................. 445
D
Data Addressing Modes...................................................... 82
Comparing Addressing Modes with the
Extended Instruction Set Enabled ...................... 86
Direct........................................................................... 82
Indexed Literal Offset.................................................. 85
BSR .................................................................... 87
Instructions Affected ........................................... 85
Mapping Access Bank ........................................ 87
Indirect ........................................................................ 82
Inherent and Literal ..................................................... 82
Data Memory ...................................................................... 72
Access Bank ............................................................... 74
Bank Select Register (BSR)........................................ 72
Extended Instruction Set............................................. 85
General Purpose Registers......................................... 74
Memory Maps
PIC18FX6J90/X7J90 Devices ............................ 73
Special Function Registers ................................. 75
Special Function Registers ......................................... 75
DAW.................................................................................. 358
DC Characteristics ............................................................ 404
Power-Down and Supply Current ............................. 396
Supply Voltage.......................................................... 395
DCFSNZ ........................................................................... 359
DECF ................................................................................ 358
DECFSZ............................................................................ 359
Default System Clock.......................................................... 38
Details on Individual Family Members ................................ 10
Development Support ....................................................... 389
Device Overview ................................................................... 9
Features (64-Pin Devices) .......................................... 11
Features (80-Pin Devices) .......................................... 11
Direct Addressing................................................................ 83
E
Effect on Standard PIC18 Instructions.............................. 386
Effects of Power-Managed Modes on Various
Clock Sources ............................................................ 43
Electrical Characteristics .................................................. 393
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART). See EUSART.
ENVREG Pin .................................................................... 333
Equations
16 x 16 Signed Multiplication Algorithm.................... 100
16 x 16 Unsigned Multiplication Algorithm................ 100
A/D Acquisition Time ................................................ 294
A/D Minimum Charging Time ................................... 294
Calculating the Minimum Required
Acquisition Time ............................................... 294
Converting Error, Clock Pulses ................................ 168
LCD Static and Dynamic Current ............................. 193
Errata .................................................................................... 8
EUSART
Asynchronous Mode................................................. 264
12-Bit Break Transmit and Receive.................. 269
Associated Registers, Receive......................... 267
Associated Registers, Transmit........................ 265
Auto-Wake-up on Sync Break Character ......... 268
Receiver ........................................................... 266
Setting up 9-Bit Mode with
Address Detect......................................... 266
Transmitter ....................................................... 264
Baud Rate Generator (BRG) .................................... 259
Associated Registers........................................ 259
Auto-Baud Rate Detect..................................... 262
Baud Rate Error, Calculating............................ 259
Baud Rates, Asynchronous Modes .................. 260
High Baud Rate Select (BRGH Bit) .................. 259
Operation in Power-Managed Modes............... 259
Sampling .......................................................... 259
Synchronous Master Mode....................................... 270
Associated Registers, Receive......................... 272
Associated Registers, Transmit........................ 271
Reception ......................................................... 272
Transmission .................................................... 270
Synchronous Slave Mode......................................... 273
Associated Registers, Receive......................... 274
Associated Registers, Transmit........................ 273
Reception ......................................................... 274
Transmission .................................................... 273
Extended Instruction Set
ADDFSR................................................................... 382
ADDULNK ................................................................ 382
CALLW ..................................................................... 383
MOVSF..................................................................... 383
MOVSS..................................................................... 384
PUSHL...................................................................... 384
SUBFSR ................................................................... 385
SUBULNK................................................................. 385
External Oscillator Modes
Clock Input (EC Modes) ............................................. 40
HS............................................................................... 39
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