PIC18F87J90 Datasheet, PDF (131/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
TABLE 10-14: PORTF FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RF1/AN6/C2OUT/ RF1
SEG19
0
O
DIG LATF<1> data output; not affected by analog input.
1
I
ST PORTF<1> data input; disabled when analog input is enabled.
AN6
1
I
ANA A/D Input Channel 6. Default configuration on POR.
C2OUT
0
O
DIG Comparator 2 output; takes priority over port data.
SEG19
x
O
ANA LCD Segment 19 output; disables all other pin functions.
RF2/AN7/C1OUT/ RF2
SEG20
0
O
DIG LATF<2> data output; not affected by analog input.
1
I
ST PORTF<2> data input; disabled when analog input is enabled.
AN7
1
I
ANA A/D Input Channel 7. Default configuration on POR.
C1OUT
0
O
DIG Comparator 1 output; takes priority over port data.
SEG20
x
O
ANA LCD Segment 20 output; disables all other pin functions.
RF3/AN8/SEG21/
RF3
C2INB
0
O
DIG LATF<3> data output; not affected by analog input.
1
I
ST PORTF<3> data input; disabled when analog input is enabled.
AN8
1
I
ANA A/D Input Channel 8 and Comparator C2+ input. Default input
configuration on POR; not affected by analog output.
SEG21
x
O
ANA LCD Segment 21 output; disables all other pin functions.
C2INB
1
I
ANA Comparator 2 Input B.
RF4/AN9/SEG22/
RF4
C2INA
0
O
DIG LATF<4> data output; not affected by analog input.
1
I
ST PORTF<4> data input; disabled when analog input is enabled.
AN9
1
I
ANA A/D Input Channel 9 and Comparator C2- input. Default input
configuration on POR; does not affect digital output.
SEG22
x
O
ANA LCD Segment 22 output; disables all other pin functions.
C2INA
1
I
ANA Comparator 2 Input A.
RF5/AN10/CVREF/ RF5
SEG23/C1INB
0
O
DIG LATF<5> data output; not affected by analog input. Disabled when
CVREF output is enabled.
1
I
ST PORTF<5> data input; disabled when analog input is enabled.
Disabled when CVREF output is enabled.
AN10
1
I
ANA A/D Input Channel 10 and Comparator C1+ input. Default input
configuration on POR.
CVREF
x
O
ANA Comparator voltage reference output. Enabling this feature disables
digital I/O.
SEG23
x
O
ANA LCD Segment 23 output; disables all other pin functions.
C1INB
1
I
ANA Comparator 1 Input B.
RF6/AN11/SEG24/ RF6
C1INA
0
O
DIG LATF<6> data output; not affected by analog input.
1
I
ST PORTF<6> data input; disabled when analog input is enabled.
AN11
1
I
ANA A/D Input Channel 11 and Comparator C1- input. Default input
configuration on POR; does not affect digital output.
SEG24
x
O
ANA LCD Segment 24 output; disables all other pin functions.
C1INA
1
I
ANA Comparator 1 Input A.
RF7/AN5/SS/
SEG25
RF7
0
O
DIG LATF<7> data output; not affected by analog input.
1
I
ST PORTF<7> data input; disabled when analog input is enabled.
AN5
1
I
ANA A/D Input Channel 5. Default configuration on POR.
SS
1
I
TTL Slave select input for MSSP module.
SEG25
x
O
ANA LCD Segment 25 output; disables all other pin functions.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
 2010 Microchip Technology Inc.
DS39933D-page 131