PIC18F87J90 Datasheet, PDF (211/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
18.0 MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
18.1 Master SSP (MSSP) Module
Overview
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D Converters, etc. The MSSP
module can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I²C™)
- Full Master mode
- Slave mode (with general address call)
The I²C interface supports the following modes in
hardware:
• Master mode
• Multi-Master mode
• Slave mode
18.2 Control Registers
Each MSSP module has three associated control
registers. These include a status register (SSPSTAT)
and two control registers (SSPCON1 and SSPCON2).
The use of these registers and their individual bits differ
significantly depending on whether the MSSP module
is operated in SPI or I²C mode.
Additional details are provided under the individual
sections.
18.3 SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO/SEG12
• Serial Data In (SDI) – RC4/SDI/SDA/SEG16
• Serial Clock (SCK) – RC3/SCK/SCL/SEG17
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RF7/AN5/SS/SEG25
Figure 18-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 18-1:
MSSP BLOCK DIAGRAM
(SPI MODE)
Read
Internal
Data Bus
Write
SSPBUF reg
SDI
SDO
SSPSR reg
bit 0
Shift
Clock
SS
SCK
SS Control
Enable
Edge
Select
2
Clock Select
SSPM<3:0>
SMP:CKE
2
4
( ) TMR2 Output
2
Edge
Select
Prescaler TOSC
4, 16, 64
Data to TXx/RXx in SSPSR
TRIS bit
 2010 Microchip Technology Inc.
DS39933D-page 211