PIC18F87J90 Datasheet, PDF (27/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
TABLE 1-4: PIC18F8XJ90 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP ^{Type Type}
Description
PORTG is a bidirectional I/O port.
RG0/LCDBIAS0
RG0
LCDBIAS0
5
I/O ST
Digital I/O.
I Analog BIAS0 input for LCD.
RG1/TX2/CK2
RG1
TX2
CK2
6
I/O ST
Digital I/O.
O
—
AUSART asynchronous transmit.
I/O ST
AUSART synchronous clock (see related RX2/DT2).
RG2/RX2/DT2/VLCAP1
RG2
RX2
DT2
VLCAP1
7
I/O ST
Digital I/O.
I
ST
AUSART asynchronous receive.
I/O ST
AUSART synchronous data (see related TX2/CK2).
I Analog LCD charge pump capacitor input.
RG3/VLCAP2
RG3
VLCAP2
8
I/O ST
Digital I/O.
I Analog LCD charge pump capacitor input.
RG4/SEG26/RTCC
RG4
SEG26
RTCC
10
I/O ST
Digital I/O.
O Analog SEG26 output for LCD.
O
—
RTCC output.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
I²C™ = I²C/SMBus
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1: Default assignment for CCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
 2010 Microchip Technology Inc.
DS39933D-page 27