PIC18F87J90 Datasheet, PDF (188/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
17.2 LCD Clock Source
The LCD driver module generates its internal clock
from 3 possible sources:
• System clock (FOSC/4)
• Timer1 oscillator
• INTRC source
The LCD clock generator uses a configurable
divide-by-32/divide-by-8192 postscaler to produce a
baseline frequency of about 1 kHz nominal, regardless
of the source selected. The clock source selection and
the postscaler configuration are determined by the
Clock Source Select bits, CS<1:0> (LCDCON<3:2>).
An additional programmable prescaler is used to derive
the LCD frame frequency from the 1 kHz baseline. The
prescaler is configured using the LP<3:0> bits
(LCDPS<3:0>) for any one of 16 options, ranging from
1:1 to 1:16.
Proper timing for waveform generation is set by the
LMUX<1:0> bits (LCDCON<1:0>). These bits
determine which Commons Multiplexing mode is to be
used and divide down the LCD clock source as
required. They also determine the configuration of the
ring counter that is used to switch the LCD commons
on or off.
17.2.1
LCD VOLTAGE REGULATOR
CLOCK SOURCE
In addition to the clock source for LCD timing, a
separate 31 kHz nominal clock is required for the LCD
charge pump. This is provided from a distinct branch of
the LCD clock source.
The charge pump clock can use either the Timer1
oscillator or the INTRC source, as well as the 8 MHz
INTOSC source (after being divided by 256 by a
prescaler). The charge pump clock source is configured
using the CKSEL<1:0> bits (LCDREG<1:0>).
17.2.2
CLOCK SOURCE
CONSIDERATIONS
When using the system clock as the LCD clock source,
it is assumed that the system clock frequency is a nom-
inal 32 MHz (for a FOSC/4 frequency of 8 MHz).
Because the prescaler option for the FOSC/4 clock
selection is fixed at divide-by-8192, system clock
speeds that differ from 32 MHz will produce frame
frequencies and refresh rates different than discussed
in this chapter. The user will need to keep this in mind
when designing the display application.
The Timer1 and INTRC sources can be used as LCD
clock sources when the device is in Sleep mode. To
use the Timer1 oscillator, it is necessary to set the
T1OSCEN bit (T1CON<3>). Selecting either Timer1 or
INTRC as the LCD clock source will not automatically
activate these sources.
Similarly, selecting the INTOSC as the charge pump
clock source will not turn the oscillator on. To use
INTOSC, it must be selected as the system clock
source by using the FOSC2 Configuration bit.
If Timer1 is used as a clock source for the device, either
as an LCD clock source or for any other purpose, LCD
segment 32 become unavailable.
FIGURE 17-2:
LCD CLOCK GENERATION
LCDCON<3:2>
System Clock (FOSC/4)
Timer1 Oscillator
Internal 31 kHz Source
2
00
01
1x
÷4
00
LCDPS<3:0>
4
÷2
01
1:1 to 1:16
÷32
÷1, 2, 3, 4
Programmable
or
10
Prescaler
÷8192 ^{Ring Counter}
11
COM0
COM1
COM2
COM3
INTOSC 8 MHz Source
LCDCON<1:0>
LCDREG<1:0>
2
2
11
÷256
10
01
31 kHz Clock
to LCD Charge Pump
DS39933D-page 188
 2010 Microchip Technology Inc.