PIC18F87J90 Datasheet, PDF (117/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
10.0 I/O PORTS
Depending on the device selected and features
enabled, there are up to nine ports available. Some
pins of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three memory mapped registers for its
operation:
• TRIS register (Data Direction register)
• PORT register (reads the levels on the pins of the
device)
• LAT register (Output Latch register)
Reading the PORT register reads the current status of
the pins, whereas writing to the PORT register writes to
the Output Latch (LAT) register.
Setting a TRIS bit (= 1) makes the corresponding port
pin an input (i.e., puts the corresponding output driver
in a high-impedance mode). Clearing a TRIS bit (= 0)
makes the corresponding port pin an output (i.e., puts
the contents of the corresponding LAT bit on the
selected pin).
The Output Latch (LAT register) is useful for
read-modify-write operations on the value that the I/O
pins are driving. Read-modify-write operations on the
LAT register read and write the latched output value for
the PORT register.
A simplified model of a generic I/O port, without the
interfaces to other peripherals, is shown in Figure 10-1.
FIGURE 10-1:
GENERIC I/O PORT
OPERATION
RD LAT
Data
Bus
WR LAT
or PORT
WR TRIS
RD TRIS
D
Q
CKx
Data Latch
D
Q
CKx
TRIS Latch
I/O pin
Input
Buffer
RD PORT
Q
D
ENEN
10.1 I/O Port Pin Capabilities
When developing an application, the capabilities of the
port pins must be considered. Outputs on some pins
have higher output drive strength than others. Similarly,
some pins can tolerate higher than VDD input levels.
10.1.1
INPUT PINS AND VOLTAGE
CONSIDERATIONS
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are used
as digital only inputs are able to handle DC voltages up
to 5.5V, a level typical for digital logic circuits. In contrast,
pins that also have analog input functions of any kind
can only tolerate voltages up to VDD. Voltage excursions
beyond VDD on these pins should be avoided.
Table 10-1 summarizes the input voltage capabilities.
Refer to Section 28.0 “Electrical Characteristics” for
more details.
TABLE 10-1: INPUT VOLTAGE TOLERANCE
PORT or Pin
Tolerated
Input
Description
PORTA<7:0>
PORTC<1:0>
PORTF<7:1>
Only VDD input levels
tolerated.
VDD
PORTG<3:2>
PORTB<7:0>
PORTC<7:2>
PORTD<7:0>
PORTE<7:3>
5.5V
Tolerates input
levels above VDD,
useful for most
standard logic.
PORTG<4,1>
PORTH<7:0>⁽¹⁾
PORTJ<7:0>⁽¹⁾
Note 1: Not available on PIC18F6XJ90 devices.
10.1.2 PIN OUTPUT DRIVE
When used as digital I/O, the output pin drive strengths
vary for groups of pins intended to meet the needs for
a variety of applications. In general, there are three
classes of output pins in terms of drive capability.
PORTB and PORTC, as well as PORTA<7:6>, are
designed to drive higher current loads, such as LEDs.
PORTD, PORTE and PORTJ can also drive LEDs but
only those with smaller current requirements. PORTF,
PORTG and PORTH, along with PORTA<5:0>, have
the lowest drive level but are capable of driving normal
digital circuit loads with a high input impedance.
Regardless of which port it is located on, all output pins
in LCD Segment or Common mode have sufficient
output to directly drive a display.
Table 10-2 summarizes the output capabilities of the
ports. Refer to the “Absolute Maximum Ratings” in
Section 28.0 “Electrical Characteristics” for more
details.
 2010 Microchip Technology Inc.
DS39933D-page 117