PIC18F87J90 Datasheet, PDF (224/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
REGISTER 18-6: SSPCON2: MSSP CONTROL REGISTER 2 (I²C™ SLAVE MODE)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
GCEN
ACKSTAT ADMSK5 ADMSK4 ADMSK3 ADMSK2 ADMSK1
bit 7
R/W-0
SEN⁽¹⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-2
bit 1
bit 0
GCEN: General Call Enable bit
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK<5:2>: Slave Address Mask Select bits
1 = Masking of corresponding bits of SSPADD is enabled
0 = Masking of corresponding bits of SSPADD is disabled
ADMSK1: Slave Address Least Significant bit(s) Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SSPADD<1> only is enabled
0 = Masking of SSPADD<1> only is disabled
In 10-Bit Addressing mode:
1 = Masking of SSPADD<1:0> is enabled
0 = Masking of SSPADD<1:0> is disabled
SEN: Stretch Enable bit⁽¹⁾
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
Note 1: If the I²C™ module is active, this bit may not be set (no spooling) and the SSPBUF may not be written (or
writes to the SSPBUF are disabled).
DS39933D-page 224
 2010 Microchip Technology Inc.