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PIC18F87J90 Datasheet, PDF (157/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology
PIC18F87J90 FAMILY
15.1.1 RTCC CONTROL REGISTERS
REGISTER 15-1: RTCCFG: RTCC CONFIGURATION REGISTER(1)
R/W-0
RTCEN(2)
bit 7
U-0
R/W-0
R-0
R-0
R/W-0
—
RTCWREN RTCSYNC HALFSEC(3) RTCOE
R/W-0
RTCPTR1
R/W-0
RTCPTR0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
RTCEN: RTCC Enable bit(2)
1 = RTCC module is enabled
0 = RTCC module is disabled
Unimplemented: Read as ‘0’
RTCWREN: RTCC Value Registers Write Enable bit
1 = RTCVALH and RTCVALL registers can be written to by the user
0 = RTCVALH and RTCVALL registers are locked out from being written to by the user
RTCSYNC: RTCC Value Registers Read Synchronization bit
1 = RTCVALH, RTCVALL and ALRMRPT registers can change while reading due to a rollover ripple
resulting in an invalid data read. If the register is read twice and results in the same data, the data
can be assumed to be valid.
0 = RTCVALH, RTCVALL and ALCFGRPT registers can be read without concern over a rollover
ripple
HALFSEC: Half-Second Status bit(3)
1 = Second half period of a second
0 = First half period of a second
RTCOE: RTCC Output Enable bit
1 = RTCC clock output enabled
0 = RTCC clock output disabled
RTCPTR<1:0>: RTCC Value Register Window Pointer bits
Points to the corresponding RTCC Value registers when reading the RTCVALH and RTCVALL registers.
The RTCPTR<1:0> value decrements on every read or write of RTCVALH<7:0> until it reaches ‘00’.
RTCVALH:
00 = Minutes
01 = Weekday
10 = Month
11 = Reserved
RTCVALL:
00 = Seconds
01 = Hours
10 = Day
11 = Year
Note 1:
2:
3:
The RTCCFG register is only affected by a POR. For resets other than POR, RTCC will continue to run
even if the device is in Reset.
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only; it is cleared to ‘0’ on a write to the lower half of the MINSEC register.
 2010 Microchip Technology Inc.
DS39933D-page 157