PIC18F87J90 Datasheet, PDF (108/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
REGISTER 9-6: PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
U-0
—
bit 7
R/W-0
LCDIF
R-0
RC2IF
R-0
TX2IF
R/W-0
CTMUIF
R/W-0
CCP2IF
R/W-0
CCP1IF
R/W-0
RTCCIF
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
LCDIF: LCD Interrupt Flag bit (valid when Type-B waveform with Non-Static mode is selected)
1 = LCD data of all COMs is output (must be cleared in software)
0 = LCD data of all COMs is not yet output
bit 5
RC2IF: AUSART Receive Interrupt Flag bit
1 = The AUSART receive buffer, RCREG2, is full (cleared when RCREG2 is read)
0 = The AUSART receive buffer is empty
bit 4
TX2IF: AUSART Transmit Interrupt Flag bit
1 = The AUSART transmit buffer, TXREG2, is empty (cleared when TXREG2 is written)
0 = The AUSART transmit buffer is full
bit 3
CTMUIF: CTMU Interrupt Flag bit
1 = CTMU interrupt occured (must be cleared in software)
0 = No CTMU interrupt occured
bit 2
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1 = A TMR1/TMR3 register capture occurred (must be cleared in software)
0 = No TMR1/TMR3 register capture occurred
Compare mode:
1 = A TMR1/TMR3 register compare match occurred (must be cleared in software)
0 = No TMR1/TMR3 register compare match occurred
PWM mode:
Unused in this mode.
bit 1
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1 = A TMR1/TMR3 register capture occurred (must be cleared in software)
0 = No TMR1/TMR3 register capture occurred
Compare mode:
1 = A TMR1/TMR3 register compare match occurred (must be cleared in software)
0 = No TMR1/TMR3 register compare match occurred
PWM mode:
Unused in this mode.
bit 0
RTCCIF: RTCC Interrupt Flag bit
1 = RTCC interrupt occured (must be cleared in software)
0 = No RTCC interrupt occured
DS39933D-page 108
 2010 Microchip Technology Inc.