PIC18F87J90 Datasheet, PDF (192/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
17.3.3.4 M3 (Hardware Contrast)
In M3, the LCD regulator is completely disabled. Like
M2, LCD bias levels are tied to AVDD and are generated
using an external divider. The difference is that the inter-
nal voltage reference is also disabled and the bottom of
the ladder is tied to ground (VSS); see Figure 17-5. The
value of the resistors, and the difference between VSS
and VDD, determine the contrast range; no software
adjustment is possible. This configuration is also used
where the LCD’s current requirements exceed the
capacity of the charge pump and software contrast
control is not needed.
Depending on the bias type required, resistors are
connected between some or all of the pins. A potentio-
meter can also be connected between LCDBIAS3 and
VDD to allow for hardware controlled contrast
adjustment.
M3 is selected by clearing the CKSEL<1:0> and CPEN
bits.
FIGURE 17-5:
RESISTOR LADDER CONNECTIONS FOR M3 CONFIGURATION
PIC18F87J90
VDD
AVDD
(2)
LCDBIAS3
LCDBIAS2
LCDBIAS1
LCDBIAS0
10 k⁽¹⁾
10 k⁽¹⁾
10 k⁽¹⁾
10 k⁽¹⁾
10 k⁽¹⁾
Static Bias
1/2 Bias
1/3 Bias
Bias Level at Pin
LCDBIAS0
LCDBIAS1
LCDBIAS2
LCDBIAS3
Static
AVSS
AVSS
AVDD
AVDD
Bias Type
1/2 Bias
AVSS
1/2 AVDD
1/2 AVDD
AVDD
1/3 Bias
AVSS
1/3 AVDD
2/3 AVDD
AVDD
Note 1:
2:
These values are provided for design guidance only; they should be optimized for the application by the
designer based on the actual LCD specifications.
A potentiometer for manual contrast adjustment is optional; it may be omitted entirely.
DS39933D-page 192
 2010 Microchip Technology Inc.