PIC18F87J90 Datasheet, PDF (176/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
16.2 Capture Mode
In Capture mode, the CCPR2H:CCPR2L register pair
captures the 16-bit value of the TMR1 or TMR3 register
when an event occurs on the CCP2 pin (RC1 or RE7,
depending on device configuration). An event is
defined as one of the following:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
The event is selected by the mode select bits,
CCP2M<3:0> (CCP2CON<3:0>). When a capture is
made, the interrupt request flag bit, CCP2IF (PIR3<2>), is
set; it must be cleared in software. If another capture
occurs before the value in register, CCPR2, is read, the old
captured value is overwritten by the new captured value.
16.2.1 CCP PIN CONFIGURATION
In Capture mode, the appropriate CCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
Note:
If RC1/CCP2 or RE7/CCP2 is configured
as an output, a write to the port can cause
a capture condition.
16.2.2 TIMER1/TIMER3 MODE SELECTION
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode or
Synchronized Counter mode. In Asynchronous Counter
mode, the capture operation may not work. The timer to
be used with each CCP module is selected in the T3CON
register (see Section 16.1.1 “CCP Modules and Timer
Resources”).
16.2.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCP2IE bit (PIE3<2>) clear to avoid false interrupts
and should clear the flag bit, CCP2IF, following any
such change in operating mode.
16.2.4 CCP PRESCALER
There are four prescaler settings in Capture mode.
They are specified as part of the operating mode
selected by the mode select bits (CCP2M<3:0>).
Whenever the CCP module is turned off, or the CCP
module is not in Capture mode, the prescaler counter
is cleared. This means that any Reset will clear the
prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 16-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 16-1: CHANGING BETWEEN
CAPTURE PRESCALERS
CLRF
MOVLW
MOVWF
CCP2CON
NEW_CAPT_PS
CCP2CON
; Turn CCP module off
; Load WREG with the
; new prescaler mode
; value and CCP ON
; Load CCP2CON with
; this value
FIGURE 16-2:
CAPTURE MODE OPERATION BLOCK DIAGRAM
CCP1 Pin
Prescaler
 1, 4, 16
Set CCP1IF
T3CCP2
and
Edge Detect
T3CCP2
TMR3H TMR3L
TMR3
Enable
CCPR1H CCPR1L
TMR1
Enable
CCP1CON<3:0> ⁴
Q1:Q4 ⁴
CCP2CON<3:0> ⁴
Set CCP2IF
T3CCP1
T3CCP2
CCP2 Pin
Prescaler
 1, 4, 16
and
Edge Detect
T3CCP2
T3CCP1
TMR1H TMR1L
TMR3H
TMR3L
TMR3
Enable
CCPR2H CCPR2L
TMR1
Enable
TMR1H
TMR1L
DS39933D-page 176
 2010 Microchip Technology Inc.