SE7210TP1-E Datasheet, PDF (93/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification

Intel® Server Board SE7210TP1-E TPS
Platform Management Architecture
The National Semiconductor PC87431 integrated management controller is a slave device on
the bus. The host interface is designed to support polled operations. Host applications can
optionally handle an SMBus alert interrupt if the National Semiconductor PC87431 integrated
management controller is unable to respond immediately to a host request. In this case, “Not
Ready” is indicated in one of two ways:
• The host interface bandwidth is limited by the bus clock and National Semiconductor
PC87431 integrated management controller latency. To meet the device latency, the
National Semiconductor PC87431 integrated management controller slows down the
bus periodically by extending the SMBus clock low interval (SCLH).
• If the National Semiconductor PC87431 integrated management controller is in the
middle of a LAN or peripheral device communication, or if a response to the host request
is not yet ready, the National Semiconductor PC87431 integrated management
controller does not acknowledge the device address (“NACK”). This forces the host
software to stop and restart the session.
For more information on read-write through SMBus refer the System Management Bus (SMBus)
Specification 2.0.
5.1.5.5
LAN Interface
The baseboard supports one DPC LAN interface via a UDP port 26Fh. The National
Semiconductor PC87431 integrated management controller supports a maximum of one
simultaneous session across all authenticated channels. The baseboard implements gratuitous
ARP support according to the IPMI 1.5 Specification.
The IPMI Specification v1.5 defines how IPMI messages, encapsulated in RMCP packet format,
can be sent to and from the National Semiconductor PC87431 integrated management
controller. This capability allows a remote console application to access the National
Semiconductor PC87431 integrated management controller and perform the following
operations:
• Chassis Control, e.g., get chassis status, reset chassis, power-up chassis, power-down
chassis
• Get system sensor status
• Get and Set system boot options
• Get Field Replaceable Unit (FRU) information
• Get System Event Log (SEL) entries
• Get Sensor Data Records (SDR)
• Set Platform Event Filtering (PEF)
• Set LAN configurations
In addition, the National Semiconductor PC87431 integrated management controller supports
LAN alerting in the form of SNMP traps that conform to the IPMI Platform Event Trap (PET)
format.
Revision 2.0
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