SE7210TP1-E Datasheet, PDF (105/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification

Intel® Server Board SE7210TP1-E TPS
Platform Management Architecture
5.2.1.3
Power Control Sources
The sources listed in the following table can initiate power-up and/or power-down activity.
Table 52: Power Control Initiators
#
Source
1 Power Button
National Semiconductor
2
PC87431 integrated
management controller
Watchdog Timer
3 Platform Event Filtering
4 Command
Power state retention
5
6 Chipset
External Signal Name or
Internal Subsystem
FP Power button
Internal National Semiconductor
PC87431 integrated management
controller timer
PEF
Routed through command processor
Implemented via National
Semiconductor PC87431 integrated
management controller internal logic
sleep S5
Capabilities
Turns power ON or OFF
Turns power OFF, or power cycle
Turns power OFF, or power cycle
Turns power ON or OFF, or power cycle
Turns power ON when AC power returns
Turns power ON or OFF
5.2.2
System Reset Control
5.2.2.1
Reset Signal Output
The National Semiconductor PC87431 integrated management controller asserts the System
Reset signal on the baseboard to perform a system reset. The National Semiconductor
PC87431 integrated management controller asserts the System Reset signal before powering
the system up. After power is stable (as indicated by the power subsystem Power Good signal),
the National Semiconductor PC87431 integrated management controller sets the processor
enable state as appropriate and de-asserts the System Reset signal, taking the system out of
reset.
To reset the system without a power state change, the National Semiconductor PC87431
integrated management controller:
1. Asserts the System Reset signal.
2. Holds this state for as long as the reset button is pushed. When a command is used to
generate a system reset, the state is held for the stipulated time.
3. De-asserts the System Reset signal.
Revision 2.0
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