SE7210TP1-E Datasheet, PDF (124/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification

Intel® Server Board SE7210TP1-E TPS
Error Reporting and Handling
There are several POST routines that issue a POST terminal error and shut down the system if
they fail. Before shutting down the system, the terminal-error handler issues a beep code
signifying the test point error, writes the error to I/O port 80h, attempts to initialize the video and
writes the error in the upper left corner of the screen (using both monochrome and color
adapters).
If POST completes normally, the BIOS issues one short beep before passing control to the
operating system.
Beeps
1
3
6
Table62 : POST Error Beep Codes
Error Message
Refresh timer test
failed
RAM R/W test failed
POST Progress Code
KBC BAT Test failed
Description
Display message and
beeps.
Display message and
beeps.
Display message and
beeps.
6.2.2.3
BIOS Recovery Beep Codes
Table63 : BIOS Recovery Beep Codes
Beeps
1
2 then 5
Error Message
Recovery Started
Recovery Boot Error
POST Progress Code
E9h
Flashing series of POST
codes: EFh, F1h,cycle.
Description
Start of recovery process
Unable to boot to floppy, ATAPI, or
ATAPI CD-ROM. Recovery process will
retry.
6.3 Bus Initialization Checkpoints
The system BIOS gives control to the different buses at several checkpoints to do various tasks.
Table 64 describes the bus initialization checkpoints.
Checkpoint
2A
38
Table 64. Bus Initialization Checkpoints
Description
Different buses init (system, static, and output devices) to start if present.
Different buses init (input, IPL, and general devices) to start if present.
While control is inside the different bus routines, additional checkpoints are output to port 80h
as WORD to identify the routines under execution. In these WORD checkpoints, the low byte of
the checkpoint is the system BIOS checkpoint from which the control is passed to the different
bus routines. The high byte of the checkpoint is the indication of which routine is being executed
in the different buses. Table 65 describes the upper nibble of the high byte and indicates the
function that is being executed.
Table 65. Upper Nibble High Byte Functions
Value
Description
0
func#0, disable all devices on the bus concerned.
110
Revision 2.0