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SE7210TP1-E Datasheet, PDF (110/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification
Intel® Server Board SE7210TP1-E TPS
Platform Management Architecture
Degraded Condition
• One or more processors are disabled by Fault Resilient Boot (FRB) or BIOS
• BIOS has disabled or mapped out some of the system memory
5.2.4.6
Chassis Intrusion Switch
The server board SE7210TP1-E supports chassis intrusion detection. The National
Semiconductor PC87431 integrated management controller monitors the state of the Chassis
Intrusion signal and makes the status of the signal available via the Get Chassis Status
command and Physical Security sensor state. If enabled, a chassis intrusion state change
causes the National Semiconductor PC87431 integrated management controller to generate a
Physical Security sensor event message with a General Chassis Intrusion offset.
5.2.4.7
Front Panel Lockout
The management controller monitors a ‘Secure Mode’ signal from the keyboard controller on the
baseboard. When the Secure Mode signal is asserted, the management controller may lock out
the ability to power down or reset the system using the power or reset push buttons,
respectively. Secure Mode may also block the ability to initiate a sleep request using the Sleep
push-button.
The management controller generates a ‘Secure Mode Violation Attempt’ event message if an
attempt it made to power-down, sleep, or reset the system using the push buttons while Secure
Mode is active.
Note: The National Semiconductor PC87431 integrated management controller will prevent the
system from powering up via button press when either secure mode or the front panel lockout
I/O signal is asserted.
5.2.5
Secure Mode Operation
Secure mode is a signal from the SIO/keyboard controller. Power and reset buttons are locked
out, except for the NMI and Chassis ID buttons. A security violation event is generated if buttons
are pressed while secure mode is active.
The Secure Mode feature allows the front panel switches and other system resources to be
protected against unauthorized use or access. Secure Mode is enabled and controlled via the
Set Secure Mode Options command.
If it is enabled, Secure Mode can be controlled via the Secure Mode KB signal from the
keyboard controller. When Secure Mode is active, pressing a protected front panel switch
generates a Secure Mode Violation event. Specifically, this generates an assertion of the
Secure Mode Violation Attempt offset of the National Semiconductor PC87431 integrated
management controller’s Platform Security Violation Attempt sensor.
The Secure Mode state is cleared whenever AC power or system power is applied, when a
system reset occurs, or when a National Semiconductor PC87431 integrated management
controller reset occurs. The Secure Mode state includes the bits that specify the actions that are
to be taken when Secure Mode is active, as well as the Force Secure Mode On bit.
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