SE7210TP1-E Datasheet, PDF (28/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification

Intel® Server Board SE7210TP1-E TPS
Functional Architecture
The Intel Server Board SE7210TP1-E supports up to four USB 2.0 ports, supports Universal
Host Controller Interface (UHCI) and Enhanced Host Controller Interface (EHCI), and uses
UHCI- and EHCI-compatible drivers.
The 6300ESB I/O provides the USB controller for all ports, as shown in Figure 4. The port
arrangement is as follows:
• Three ports are implemented with stacked back panel connectors
• One port is routed to a USB header which can be connected with a USB cable to the
front panel connector
Figure 4. USB Port Configuration
✏ ^NOTES
Server systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that
meets the requirements for full-speed devices.
3.2.14
Real Time Clock, CMOS SRAM, and Battery
The real-time clock provides a time-of-day clock and a multi-century calendar with alarm
features. The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks
that are reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the server is
not plugged into a wall socket, the battery has an estimated life of three years. When the server
is plugged in, the standby current from the power supply extends the life of the battery. The
clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS
values can be returned to their defaults by using the BIOS Setup program.
✏ NOTE
If the battery and AC power fail, the custom defaults, if previously saved, will be loaded into
CMOS RAM at power-on.
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