SE7210TP1-E Datasheet, PDF (44/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification

Intel® Server Board SE7210TP1-E TPS
Functional Architecture
3.4.6
IDE Support
Integrated IDE controllers of the 6300ESB I/O provide two independent IDE channels, each
capable of supporting up to two drives. A standard 40-pin IDE connector on the baseboard
interfaces with both channels. Both IDE channels can be configured or enabled/disabled by
accessing the BIOS Setup Utility during POST.
3.4.6.1
Ultra ATA/100
The IDE interfaces of the ICH5R DMA protocol redefines signals on the IDE cable to allow both
host and target throttling of data and transfer rates of up to 100 MB/s.
3.4.6.2
IDE Initialization
The BIOS supports the ATA/ATAPI Specification, version 6 or later. The BIOS initializes the
embedded IDE controller in the chipset (ICH5R) and the IDE devices that are connected to
these devices. The BIOS scans the IDE devices and programs the controller and the devices
with their optimum timings. The IDE disk read/write services that are provided by the BIOS will
use PIO mode, but the BIOS will program the necessary Ultra DMA registers in the IDE
controller so that the operating system can use the Ultra DMA Modes.
3.4.7
SATA Support
The integrated Serial ATA (SATA) controller of the 6300ESB I/O provides two SATA ports on
the baseboard. The SATA ports can be enabled/disabled and/or configured by accessing the
BIOS Setup Utility during POST.
The SATA function in the 6300ESB I/O has dual modes of operation to support different
operating system conditions. In the case of Native IDE enabled operating systems, the
6300ESB I/O has separate PCI functions for serial and parallel ATA. To support legacy
operating systems, there is only one PCI function for both the serial and parallel ATA ports. The
MAP register provides the ability to share PCI functions. When sharing is enabled, all decode of
I/O is done through the SATA registers. Device 31, Function 1 (IDE controller) is hidden by
software writing to the Function Disable Register (D31, F0, offset F2h, bit 1), and its
configuration registers are not used. The SATA Capability Pointer Register (offset 34h) will
change to indicate that MSI is not supported in combined mode.
The 6300ESB I/O SATA controller features two sets of interface signals that can be
independently enabled or disabled. Each interface is supported by an independent DMA
controller. The 6300ESB I/O SATA controller interacts with an attached mass storage device
through a register interface that is equivalent to that presented by a traditional IDE host adapter.
The host software follows existing standards and conventions when accessing the register
interface and follows standard command protocol conventions.
SATA interface transfer rates are independent of UDMA mode settings. SATA interface transfer
rates will operate at the bus’s maximum speed, regardless of the UDMA mode reported by the
SATA device or the system BIOS.
30
Revision 2.0