SE7210TP1-E Datasheet, PDF (52/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification

Intel® Server Board SE7210TP1-E TPS
Functional Architecture
Address (hex)
0378 - 037F
Size
8 bytes
Description
03B0 - 03BB
12 bytes
Intel E7210 MCH
03C0 - 03DF
32 bytes
Intel E7210 MCH
03E8 - 03EF
8 bytes
03F0 - 03F5
6 bytes
Diskette channel 1
03F6
1 byte
Primary IDE channel command port
03F8 - 03FF
8 bytes
COM1
04D0 - 04D1
2 bytes
Edge/level triggered PIC
LPTn + 400
8 bytes
0CF8 - 0CFB ^{(Note 2)} 4 bytes
PCI configuration address register
0CF9 ^{(Note 3)}
1 byte
Reset control register
0CFC - 0CFF
4 bytes
PCI configuration data register
FFA0 - FFA7
8 bytes
Primary bus master IDE registers
FFA8 - FFAF
8 bytes
Secondary bus master IDE registers
Notes:
1. Default, but can be changed to another address range
2. Dword access only
3. Byte access only
3.5.2.1
Device Number and IDSEL Mapping
Each device under the PCI hub bridge has its IDSEL signal connected to one bit of AD[31:16],
which acts as a chip select on the PCI bus segment in configuration cycles. This determines a
unique PCI device ID value for use in configuration cycles. The following table shows each IDSEL
value for the PCI bus devices and the corresponding device description.
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Revision 2.0