SE7210TP1-E Datasheet, PDF (102/145 Pages) Intel Corporation – Intel® Server Board Technical Product Specification

Intel® Server Board SE7210TP1-E TPS
Platform Management Architecture
The following list presents the type of Alerting configuration options that are provided:
• Enabling/Disabling PEF.
• Configuring Alert actions.
• Selecting which pre-configured events trigger an alert.
• Generating a ‘test’ event to allow the paging configuration to be checked.
• Configuring the serial/modem and PPP communication and link parameters.
• Configuring the alert destination information, including LAN addresses, phone numbers,
Alert strings, etc.
• Configuring the PPP Accounts for PPP Alerting (PPP Accounts represent the phone
number and user login information necessary to connect to a remote system via PPP).
5.1.12.5
Alerting On Power Down Events
The National Semiconductor PC87431 integrated management controller is capable of
generating alerts while the system is powered down. A watchdog power-down event alert is sent
after the power down so that the alert does not delay the power-down action.
5.1.12.6
Alerting On System Reset Events
Reset event alerts occur after the reset. The alerting process must complete before the system
reset is completed. This is done to simplify timing interactions between the National
Semiconductor PC87431 integrated management controller and BIOS initialization after a
system reset.
5.1.12.7
Alert-in-Progress Termination
An alert in progress will be terminated by a system reset or power on, or by disabling alerting via
commands to the management controller.
5.1.13
NMI Generation
The following may cause the National Semiconductor PC87431 integrated management
controller to generate an NMI pulse:
• Receiving a Chassis Control command issued from one of the command interfaces. Use
of this command will not cause an event to be logged in the SEL.
• Detecting that the front panel Diagnostic Interrupt button has been pressed.
• A PEF table entry matching an event where the filter entry has the NMI action indicated.
• A processor IERR or Thermal Trip (if the National Semiconductor PC87431 integrated
management controller is so configured).
• Watchdog timer pre-timeout expiration with NMI pre-timeout action enabled.
The National Semiconductor PC87431 integrated management controller-generated NMI pulse
duration is 200ms. This time is chosen to try to avoid the BIOS missing the NMI if the BIOS is in
the SMI Handler and the SMI Handler is masking the NMI.
Once an NMI has been generated by the National Semiconductor PC87431 integrated
management controller, the National Semiconductor PC87431 integrated management
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