CD1284 Datasheet, PDF (60/176 Pages) Intel Corporation – IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports

CD1284 — IEEE 1284-Compatible Parallel Interface Controller
control is used, then DTR* goes inactive when the receive FIFO reaches the programmed
threshold, causing the modem to drop the connection (carrier) to the remote, — this is not the
correct use of this function.
Table 19. Modem Control Pin Functions
Modem Control
Pins
Function
RTS*
CTS*
DTR*
DSR*
CD*
RI
Request to send (general-purpose output)
Clear to send (general-purpose input)
Data terminal ready (carrier detect/general-
purpose input/output)
Data set ready (general-purpose input)
Carrier detect (general-purpose input)
Ring indicator (general-purpose input)
Modem pins are implemented as I/O ports accessible by either the CD1284 internal microcode or
the host. The modem pins are not connected directly to the transmit or receive hardware. When a
user programs the out-of-band modem functions to be active, the CD1284 microcode reads from
and writes to these pins. Specifically, when RTS* and CTS* are used for transmit flow control, the
CD1284 microcode asserts RTS* and senses CTS*, as required (Table 19). Also, when the receive
FIFO is full, DTR* is negated. The host must not reassert DTR* inadvertently.
Note: The host is not ‘locked out’ of accessing these bits; ensure that these bits are not written to when
auto out-of-band flow control is enabled as it could cause a system malfunction.
The user can directly control RTS* and DTR* and can probe the state of the CTS*, CD*, and
DSR* inputs through the MSVR. Since the host is accessing these pins directly, there is no delay in
its ability to detect a level change.
The CD1284 can be programmed to detect level changes and generate service requests when level
changes occur. It does this in firmware by reading DTR* and CD* and comparing them to a
previously stored value. This function is performed in the main timing loop of the firmware; the
maximum time required to detect a level change in worst-case conditions is approximately 2 ms.
When the CD1284 is performing this function, the modem pins are periodically sampled rather
than continuously monitored. In this way they have minimal sensitivity to noise, a desirable feature
in data communication applications. However, in extremely noisy applications, reread a modem
line that caused a modem signal change service request to verify it has changed and is not
malfunctioning. This eliminates even the slightest possibility of a noise pulse causing erratic
operation.
When the CD1284 is monitoring modem pins to control transmit or receive functions, it does not
rely on the previously stored value, but instead checks the pins at the appropriate time. Thus, there
is very little delay in this response. For example, before deciding to transmit another character, it
examines the CTS* pin at that time. The CD1284 makes this decision when moving characters
from the FIFO to the Holding register, not from the Holding register to the Shift register.
Note that the logical sense of the modem bits is inverted; that is, a write of ‘1’ to MSVR1 or
MSVR2 causes the output pin to go to nominal zero volts. Likewise, a low-voltage input is sensed
as ‘1’.
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Datasheet