CD1284 Datasheet, PDF (124/176 Pages) Intel Corporation – IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports

CD1284 — IEEE 1284-Compatible Parallel Interface Controller
Bit
Description
4
Ignore Parity: If this bit is set, the CD1284 ignores the parity on all incoming characters, thus no receive
exception service requests are generated if the parity is in error. If the bit is cleared, parity is evaluated.
Stop Bit Length: These two bits set the length, in bit times, of the Stop bit for each character.
Stop1
Stop0
Number of Stop Bits
0
0
1
3:2
0
1
1.5
1
0
2
1
1
Not used.
Character Length: ChL1 and ChL0 select the length of each character, in number of bits. The CD1284
receives and transmits the same length character, on a given channel, in the range of five to eight bits.
ChL1
ChL0
Character Length
1:0
0
0
5 bits
0
1
6 bits
1
0
7 bits
1
1
8 bits
7.4.2
Channel Option Register 2
Register Description: COR2
Register Description: Channel Option Register 2
Access: Read/Write
Bit 7
Bit 6
Bit 5
IXM
TxIBE
ETC
Bit 4
LLM
Bit 3
RLM
Bit 2
RtsAO
8-Bit Hex Address: 09
Default Value: 00
Bit 1
CtsAE
Bit 0
DsrAE
Bit
Description
Implied XON mode: This bit enables the automatic resumption of character transmission upon the reception
7
of any character. This bit only has meaning if the transmitter is in Automatic In-band Flow-control mode as
programmed by the TxIBE control bit. When this bit is reset and TxIBE is enabled, the reception of any
character restarts character transmission.
Enable Automatic In-band Transmit Flow Control: This bit allows the CD1284 to examine error-free
incoming characters looking for an XOFF character (as programmed by SCHR2), if the special character
6
match function is enabled (COR3[4]). If a match occurs, transmission ceases after the current characters in
the Transmitter Shift register and Transmitter Holding register are sent. Transmission resumes when an XON
character (or any character, depending on the value of the IXM bit) is received or if a channel enable
command is issued by the CCR.
Embedded Transmit Command Enable: If the ETC bit is set, the CD1284 examines characters in the
5
transmit FIFO. If an embedded command is detected, it is processed. See the embedded transmit command
description in Chapter 5.0 for details of valid commands.
124
Datasheet