CD1284 Datasheet, PDF (132/176 Pages) Intel Corporation – IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports

CD1284 — IEEE 1284-Compatible Parallel Interface Controller
7.5.7
ClkSel2
1
1
1
ClkSel1
0
1
1
ClkSel0
1
0
1
Received Data Count Register
Not used.
Clock Selected
Register Name: RDCR
Register Description: Received Data Count
Access: Read only
Bit 7
Bit 6
Bit 5
0
0
0
Bit 4
0
Bit 3
CT3
Bit 2
CT2
8-Bit Hex Address: 0E
Default Value: 00
Bit 1
CT1
Bit 0
CT0
The RDCR indicates the number of good characters currently in the serial received data FIFO. Host
software can use this value as a loop counter when taking characters out of the FIFO. The value in
this register is only valid during the context of a service request acknowledge. At other times, it
may or may not give a true indication of the number of characters in the FIFO.
Bit
Description
7:4
These bits must always be ‘0’.
Character Count 3:0: The encoding for these bits is:
CT3
CT2
CT1
CT0
Number of characters in FIFO
0
0
0
0
Not used.
0
0
0
1
1 character
0
0
1
0
2 characters
3:0
•
•
•
•
1
0
1
1
11 characters
1
1
0
0
12 characters
1
1
0
1
1
1
1
0
Not used.
1
1
1
1
132
Datasheet