MB86613S Datasheet, PDF (85/134 Pages) Fujitsu Component Limited. – IEEE1394 Open HCI Controller

Preliminary
1
m
3
n
This bit indicates ”1” when the serial selfID exists.
This bit specifies the identification No. of selfID packet.
31
24 23
16 15
87
0
01
phy_ID
logical inverse of first quadlet
Bit
----
6
Fig. 6.2 link on packet receive Format
Field Name
description
-------------- ------------------------------------------
phy_ID
This bit specifies the node number of the place at which a packet is received.
31
24 23
16 15
87
0
00
root_ID
RT
gap_cnt
logical inverse of first quadlet
Bit
----
6
1
1
6
Fig. 6.3 phy configuration receive Format
Field Name
description
-------------- ------------------------------------------
root_ID
This bit specifies the node number of the place where a packet goes out.
R
This bit indicates ”1” when the root_ ID field has valid data.
If its node number is different from that indicated in the root_ ID field when this bit
indicates ”1”, RHB bit of the PHY register should be cleared.
T
This bit indicates ”1” when the gap_cnt field has valid data.
When this bit indicates ”1”, the value contained in the gap_cnt field should be
stored in the gap_count field of the PHY register.
gap_cnt
This bit indicates the value which should be stored into the gap_count field of the
PHY register.
31
24 23
16 15
87
0
00
phy_ID
00 type
logical inverse of first quadlet
Bit
----
6
4
Fig. 6.4 ping packet receive Format
Field Name
description
-------------- ------------------------------------------
phy_ID
This bit indicates the node number of the place at which a packet is received.
type
”00h” : ping packet
84