MB86613S Datasheet, PDF (54/134 Pages) Fujitsu Component Limited. – IEEE1394 Open HCI Controller

Preliminary
MORE
P1
LAST_Immediate
MORE_
Immediate
P2
LAST
INT
Fig. 4.3 State Machine of Program Analysis for Asynchronous Packet Transmit
4.1.2. Interrupt Handle
There are a number of interrupts possibly occur in the asynchronous transmit. The following lists the error
name, code, and the description:
(1) evt_descriptor_read : 06h
when a PCI bus error occurs while the context program moves from the host memory into the work RAM.
(2) evt_unknown : 0Eh
when the context program can not be processed because of some problem with it.
(3) evt_data_read : 07h
when a PCI bus error occurs while the packet data moves from the host memory into the FIFO.
(4) evt_data_write : 08h
when a PCI bus error occurs while the data is put into the xferStatus and timeStamp sections in the descriptor.
(5) evt_tcode_err : 0Bh
when the tcode for the transmit packet is undefined or unknown. (this case, no packet is transmitted.)
(6) evt_timeout : 0Ah
when the time specified in the timeStamp section exceeds the cycle- timer value for the response packet.
(this case, no packet is transmitted.)
(7) evt_underrun : 04h
when the FIFO becomes empty while transmitting the packet. (or when the PCI bus error occurs while trans-
mitting the packet.)
(8) evt_flushed : 0Fh
when the bus reset occurs while transmitting the packet.
53