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MB86613S Datasheet, PDF (84/134 Pages) Fujitsu Component Limited. – IEEE1394 Open HCI Controller | |||
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Preliminary
31
24 23
16 15
10
phy_ID
0L
gap_cnt
sp
87
0
c pwr p0 p1 p2 i m
logical inverse of first quadlet
31
24 23
10
phy_ID
1 n(0)
16 15
87
0
p3 p4 p5 p6 p7 p8 p9 p10 m
logical inverse of first quadlet
31
24 23
16 15
87
0
10
phy_ID
1 n(1)
p11 p12 p13 p14 p15
logical inverse of first quadlet
Bit
----
6
1
6
2
1
3
2
1
Field Name
--------------
phy_ID
Fig. 6.1 selfID packet receive Format
description
------------------------------------------
This bit specifies the node number of the place from which a packet is
transmitted.
L
This bit indicates â1â when LINK of the place from which a packet is transmitted is
ON.
gap_cnt
This bit specifies the value stored in Gap_count field of PHY register at the place
from which a packet is transmitted.
sp
This bit specifies the maximum transfer rate of the place from which a packet is
transmitted.
â00bâ : 100Mbit/sec
â01bâ : 200Mbit/sec
â10bâ : 400Mbit/sec
c
This bit indicates â1â when the place from which a packet is transmitted can be
the resource manager.
pwr
This bit specifies the power supply type of the place from which a packet is
transmitted.
â000bâ : Power is not supplied to a cable power.
â001bâ : Minimum 15W is supplied to a cable power.
â010bâ : Minimum 30W is supplied to a cable power.
â011bâ : Minimum 45W is supplied to a cable power.
â100bâ : Maximum 1W is consumed from a cable power.
â101bâ : Minimum 3W is consumed from a cable power.
â110bâ : Minimum 6W is consumed from a cable power.
â111bâ : Minimum 10W is consumed from a cable power.
p0- p15
This bit specifies the connection type of each port on the place from which a
packet is transmitted.
â11bâ : connect to child node
â10bâ : connect to parent node
â01bâ : disconnect
â00bâ : unknown
i
This bit indicates â1â when the place from which a packet is transmitted is the
source of bus reset.
83
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