MB86613S Datasheet, PDF (16/134 Pages) Fujitsu Component Limited. – IEEE1394 Open HCI Controller

Preliminary
3.1.2. Device ID
Bit
Field Name
rwcu
---- -------------- ----
31:16 Device ID
r
reset
description
-------- ------------------------------------------
2010h
Device ID = ”2010”h.
3.1.3. Command
This register controls the MB86613S functions when generating and responding to the PCI cycle. Writing
”0000”h at this register separate the device from PCI interface except for the configuration access.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
i/o_enable
memory_enable
master_enable
Invalidate_enable
parity_err_enable
stepping_enable
SERR_enable
Bit
----
8
7
6
4
2
1
0
Field Name
rwcu
-------------- ----
SERR_enable
rw
stepping_enable r
parity_err_enable rw
Invalidate_enable rw
master_enable
rw
memory_enable rw
i/o_enable
rw
reset
--------
0b
description
------------------------------------------
0 : Does not output SERR#.
1 : Outputs SERR# if a parity error is detected.
0b
Since the device does not support the stepping function,
this bit always indicates ”0”.
0b
0 : Does not output PERR#.
1 : Outputs PERR# if a parity error is detected.
0b
0 : Uses memory write command.
1 : Uses memory write & invalidate command.
0b
0 : Prohibits the bus master operation.
1 : Allows the bus master operation.
0b
0 : 0 : Prohibits the memory access.
1 : Allows the memory access.
0b
0 : Prohibits the I/O access.
1 : Allows the I/O access.
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