MB86613S Datasheet, PDF (81/134 Pages) Fujitsu Component Limited. – IEEE1394 Open HCI Controller

Preliminary
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Fig. 5.1 Bus Reset Packet Format
5.4. Physical Configuration Packet Receive
When LINK receives a phy configuration packet, it performs several types of operation depending on the reg-
ister settings as follows:
(1) If PacketControl.autoPhyPkt bit is cleared while LinkControl.rcvPhyPkt bit is set :
Stores the received phy configuration packet into the FIFO. Software must set the RHB bit and
Gap_count field in the PHY register (address 0001b) from the received phy configuration packet as
follows:
a) RHB : Set the RHB bit only when a value set in the root_ID field while R bit of phy configuration
packet is set is equal to the chip node number. If not equal, clear the RHB bit.
b) Gap_count : Set a value specified in the gap_cnt field while T bit of phy configuration packet
is set in the Gap_count field.
(2) If PacketControl.autoPhyPkt bit is set while LinkControl.rcvPhyPkt bit is cleared :
It does not store the received phy configuration packet in the FIFO. LINK analyzes the received phy
configuration packet and updates the RHB bit of PHY register (address 0001b) and Gap_count field
automatically.
(3) If HCControl.linkEnable bit is cleared:
It does not store the received phy configuration packet in the FIFO. LINK analyzes the received phy
configuration packet and updates the RHB bit of PHY register (address 0001b) and Gap_count field
automatically.
(4) If PacketControl.autoPhyPkt bit is cleared while LinkControl.rcvPhyPkt bit is cleared :
This condition/setting is prohibited.
Also, please notice that HCControl.linkEnable bit must be cleared if the system of MB86613S is powered off
while another node is providing the MB86613S system with the power.
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