MB86613S Datasheet, PDF (20/134 Pages) Fujitsu Component Limited. – IEEE1394 Open HCI Controller

Preliminary
3.1.12. CARDBUS CIS Pointer
This register indicates the head address for the EPROM (BIOS ROM) that contains the card bus information.
When the device is released from a hardware reset, it automatically loads the required data from the externally
connected EEPROM.
31
24 23
16 15
87
0
CIS_pointer
Bit
----
31:0
Field Name
rwcu
-------------- ----
CIS_pointer
r
reset
description
-------- ------------------------------------------
undefined These bits indicate the CIS pointer.
3.1.13. Subsystem
This register indicates the subsystem and subsystem- vendor ID (product ID) to identify the MB86613S device
when it is connected together with another device on the same add- on board. The data are automatically
loaded from the external EEPROM when the chip is released from the hardware reset.
31
24 23
16 15
87
0
subsystem_ID
subsystem_vendor_ID
Bit
Field Name
---- ------------------
31:16 subsystem_ID
15:0 subsystem_vender_ID
rwcu
----
r
r
reset description
-------- -----------------------------------
undefined These bits indicate the subsystem ID.
undefined These bits indicate the subsystem vendor ID.
3.1.14. Expansion ROM Base Address
This register specifies the base address for the EPROM (BIOS ROM) device externally connected with the
MB86613S device. The data are automatically loaded by the rom_enable bit from the external EEPROM
when the chip is released from the hardware reset.
31
24 23
16 15
87
0
rom_mem_addr
rom_enable
Bit
Field Name
rwcu
---- -------------- ----
31:16 rom_mem_addr rw
reset
--------
0000h
description
------------------------------------------
These bits specify the base address for the BIOS ROM.
(64K- byte boundary)
15:1 rom_mem_addr r
0000h
These bits indicate ”0000h”.
0
rom_enable
rw
0b
The specified base address is enabled by writing 1 at this
bit if the Command.memory_enable bit is also set.
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