MB86613S Datasheet, PDF (62/134 Pages) Fujitsu Component Limited. – IEEE1394 Open HCI Controller

Preliminary
(7) ack_type_error : 1Eh
when the block- write- request packet that exceeds the maximum payload count is received. or, when the
tcode in the received packet is undefined.
(8) ack_pending : 12h
when a packet is received normally and the response packet needs to be transmitted.
(9) ack_complete : 11h
when a packet is completely received.
The following describes and shows the state machine of interrupt handling:
I1 . . . . Set the interrupt event code in the ContextControl.eventcode field and then further set the interrupt
code and remained byte count of the host memory in the xferStatus and resCount fields in the last
descriptor. After completing these processes, go to the procedure I3 if the context program has been
processed correctly. If it could not be processed correctly then go to the procedure I2.
I2 . . . . Set the IntEvent.unrecoverableError bit if the ’ i ’ flag in the last descriptor indicates ’11b’. Then store
the start address of host memory where the error descriptor is contained in the
CommandPtr.descriptorAddress field, and return to Start.
I3 . . . . If the ’ i ’ flag in the last descriptor indicates ’11b’, set the IntEvent.ARRQ or ARRS bit. After that, if ”0” is
indicated in the Z field in the last descriptor, return to the START. If ”1” is indicated, then store the
address set in the branchAddress field in the CommandPtr.descriptorAddress of the last descriptor.
After the process completed, go to the program loading process.
The MB86613S device has a function that automatically processes for error when it occurs. This is called
”back- out” process. Back- out process removes packets from the host memory when an error is found on the
packet such as data length error and data CRC error. This function allows the device to store only the correct
packets in the memory, that results in having the proper acknowledge such as ack_complete and ack_pend-
ing The following describes some cases where this back- out process is taken:
1) FIFO was full while receiving packets.
2) data_length_error or data_CRC_error occurred on receive packets.
3) Bus reset occurred while receiving packets.
Also, in case where the above error occurs at the packets that are stored over two host memory(s), like the
packet- 2 shown in Figure 4.18, the descriptor control is returned to the descriptor- 1’s.
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