MC68HC705C9A_1 Datasheet, PDF (99/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification — MC68HC705C9A
Section 10. Serial Peripheral Interface
10.1 Content
10.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99
10.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
10.4 SPI Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
10.4.1 Master In Slave Out (MISO) . . . . . . . . . . . . . . . . . . . . . . .101
10.4.2 Master Out Slave In (MOSI) . . . . . . . . . . . . . . . . . . . . . . .101
10.4.3 Serial Clock (SCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
10.4.4 Slave Select (SS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
10.5 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103
10.6 SPI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
10.6.1 Serial Peripheral Control Register (SPCR) . . . . . . . . . . . .105
10.6.2 Serial Peripheral Status Register (SPSR) . . . . . . . . . . . . .107
10.6.3 Serial Peripheral Data I/O Register (SPDR) . . . . . . . . . . .109
10.2 Introduction
The serial peripheral interface (SPI) is an interface built into the device
which allows several MC68HC05 MCUs, or MC68HC05 MCU plus
peripheral devices, to be interconnected within a single printed circuit
board. In an SPI, separate wires are required for data and clock. In the
SPI format, the clock is not included in the data stream and must be
furnished as a separate signal. An SPI system may be configured in one
containing one master MCU and several slave MCUs, or in a system in
which an MCU is capable of being a master or a slave.
MC68HC705C9A — Rev. 2.0
Serial Peripheral Interface
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