MC68HC705C9A_1 Datasheet, PDF (81/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification
Features
INTERNAL BUS
$0011
TRANSMIT
DATA
REGISTER
SCI INTERRUPT
+
$0011
RECEIVE
DATA
REGISTER
&
&
&
&
$000F
SCCR2
TDO
PIN
TRANSMIT
DATA SHIFT
REGISTER
+
TIE
TCIE
RIE
ILIE
7
6
5
4
RECEIVE
DATA SHIFT
REGISTER
RDI
PIN
TE 3
RE 2
SBK 1
RWU 0
SCSR
$0010
7
6
5
4
32
1
TRDE TC RDRF IDLE OR NF FE
WAKEUP
UNIT
TE
SBK
7
TRANSMITTER
CONTROL
FLAG
CONTROL
RECEIVER
CONTROL
RECEIVER
CLOCK
7
65
4
32
1
0 SCCR1
R8 T8
M WAKE
$000E
Figure 9-1. Serial Communications Interface Block Diagram
NOTE:
The serial communications data register (SCI SCDR) is controlled by the
internal R/W signal. It is the transmit data register when written to and
the receive data register when read.
MC68HC705C9A — Rev. 2.0
Serial Communications Interface (SCI)
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