MC68HC705C9A_1 Datasheet, PDF (56/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification _{MC68HC05C9A Compatible COP}
5.6.2 C9A COP Control Register
The COP control register, shown in Figure 5-5, performs the following
functions:
• Enables clock monitor function
• Enables MC68HC05C9A compatible COP function
• Selects timeout duration of COP timer
and flags the following conditions:
• A COP timeout
• Clock monitor reset
$001E Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
COPF CME COPE CM1
CM0
Write:
Reset: 0
0
0
U
0
0
0
0
= Unimplemented U = Undetermined
Figure 5-5. COP Control Register (COPCR)
COPF — Computer Operating Properly Flag
Reading the COP control register clears COPF.
1 = COP or clock monitor reset has occurred.
0 = No COP or clock monitor reset has occurred.
CME — Clock Monitor Enable
This bit is readable any time, but may be written only once.
1 = Clock monitor enabled
0 = Clock monitor disabled
MC68HC705C9A — Rev. 2.0
Resets
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