MC68HC705C9A_1 Datasheet, PDF (73/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification
Timer I/O Registers
8.4.3 Timer Registers (TRH and TRL)
The timer registers, shown in Figure 8-4, contains the current high and
low bytes of the 16-bit counter. Reading TRH before reading TRL
causes TRL to be latched until TRL is read. Reading TRL after reading
the timer status register clears the timer overflow flag (TOF). Writing to
the timer registers has no effect.
TRH
$0018
Read:
Write
Reset:
Bit 7
BIT15
1
6
BIT14
1
5
BIT13
1
4
BIT12
1
3
BIT11
1
2
BIT10
1
1
BIT9
1
Bit 0
BIT8
1
TRL
$0019
Read:
Write:
Reset:
Bit 7
BIT7
1
6
BIT6
5
BIT5
1
1
= Unimplemented
4
BIT4
1
3
BIT3
1
2
BIT2
1
1
BIT1
0
Bit 0
BIT0
0
Figure 8-4. Timer Registers (TRH and TRL)
MC68HC705C9A — Rev. 2.0
Capture/Compare Timer
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