MC68HC705C9A_1 Datasheet, PDF (62/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification _{Wait Mode}
OSC11
tRL
RESET
IRQ2
tLIH
IRQ3
tILCH
4064 tcyc
INTERNAL
CLOCK
INTERNAL
ADDRESS
BUS
NOTES:
1. Represents the internal gating of the OSC1 pin
2. IRQ pin edge-sensitive mask option
3. IRQ pin level and edge-sensitive mask option
3FFE 3FFE 3FFE 3FFE 3FFF
RESET OR INTERRUPT
VECTOR FETCH
Figure 6-1. Stop Recovery Timing Diagram
6.4 Wait Mode
The WAIT instruction places the MCU in a low-power consumption
mode, but the wait mode consumes more power than the stop mode. All
CPU action is suspended, but the timer, SCI, SPI, and the oscillator
remain active. Any interrupt or reset will cause the MCU to exit the wait
mode.
During wait mode, the I bit in the CCR is cleared to enable interrupts. All
other registers, memory, and input/output lines remain in their previous
state. The timer, SCI, and SPI may be enabled to allow a periodic exit
from the wait mode.
MC68HC705C9A — Rev. 2.0
Low-Power Modes
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