MC68HC705C9A_1 Datasheet, PDF (45/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification — MC68HC705C9A
Section 4. Interrupts
4.1 Contents
4.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
4.3 Non-Maskable Software Interrupt (SWI). . . . . . . . . . . . . . . . . .47
4.4 External Interrupt (IRQ or Port B) . . . . . . . . . . . . . . . . . . . . . . .47
4.5 Timer Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
4.6 SCI Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
4.7 SPI Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
4.2 Introduction
The MCU can be interrupted by five different sources, four maskable
hardware interrupts, and one non-maskable software interrupt:
• External signal on the IRQ pin or port B pins
• 16-bit programmable timer
• Serial communications interface
• Serial peripheral interface
• Software interrupt instruction (SWI)
Interrupts cause the processor to save register contents on the stack
and to set the interrupt mask (I bit) to prevent additional interrupts. The
RTI instruction causes the register contents to be recovered from the
stack and normal processing to resume.
Unlike RESET, hardware interrupts do not cause the current instruction
execution to be halted, but are considered pending until the current
instruction is complete.
MC68HC705C9A — Rev. 2.0
Interrupts
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