MC68HC705C9A_1 Datasheet, PDF (42/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification _{CPU Registers}
3.3 CPU Registers
The MCU contains five registers as shown in the programming model of
Figure 3-1. The interrupt stacking order is shown in Figure 3-2.
7
7
15
PC
15
7
000000001 1
0
A
ACCUMULATOR
0
X
INDEX REGISTER
0
PROGRAM COUNTER
0
SP
STACK POINTER
CCR
H INZC
CONDITION CODE REGISTER
Figure 3-1. Programming Model
7
0 _STACK
INCREASING
MEMORY
ADDRESSES
1 1 1 CONDITION CODE REGISTER _I
R
E
T
U
R
N
ACCUMULATOR
INDEX REGISTER
PCH
N
T
E DECREASING
R
MEMORY
R ADDRESSES
U
P
PCL
T
UNSTACK
Figure 3-2. Interrupt Stacking Order
MC68HC705C9A — Rev. 2.0
Central Processing Unit
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