MC68HC705C9A_1 Datasheet, PDF (31/157 Pages) Freescale Semiconductor, Inc – General Release Specification

1.7.9 PB0–PB7
Freescale Semiconductor, Inc.
General Release Specification
Functional Pin Descriptions
These eight I/O lines comprise port B. The state of each pin is software
programmable and all port B pins are configured as inputs during reset.
Port B has mask option register enabled pullup devices and interrupt
capability selectable for any pin. Refer to Section 7. Input/Output Ports
for more detail.
1.7.10 PC0–PC7
These eight I/O lines comprise port C. The state of each pin is software
programmable and all port C pins are configured as inputs during reset.
PC7 has high current sink and source capability. Refer to Section 7.
Input/Output Ports for more detail.
1.7.11 PD0–PD5 and PD7
These seven I/O lines comprise port D. When configured as a C9A the
state of each pin is software programmable and all port D pins are
configured as inputs during reset. When configured as a C12A, the port
D pins are input only. Refer to Section 7. Input/Output Ports for more
detail.
MC68HC705C9A — Rev. 2.0
General Description
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