MC68HC705C9A_1 Datasheet, PDF (67/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification — MC68HC705C9A
Section 8. Capture/Compare Timer
8.1 Content
8.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
8.3 Timer Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
8.3.1 Input Capture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
8.3.2 Output Compare . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
8.4 Timer I/O Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70
8.4.1 Timer Control Register (TCR) . . . . . . . . . . . . . . . . . . . . . . .70
8.4.2 Timer Status Register (TSR) . . . . . . . . . . . . . . . . . . . . . . . .72
8.4.3 Timer Registers (TRH and TRL) . . . . . . . . . . . . . . . . . . . . .73
8.4.4 Alternate Timer Registers (ATRH and ATRL) . . . . . . . . . . .74
8.4.5 Input Capture Registers (ICRH and ICRL) . . . . . . . . . . . . .75
8.4.6 Output Compare Registers (OCRH and OCRL) . . . . . . . . .76
8.5 Timer During Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
8.6 Timer During Stop Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
8.2 Introduction
This section describes the operation of the 16-bit capture/compare timer.
Figure 8-1 shows the structure of the capture/compare subsystem.
MC68HC705C9A — Rev. 2.0
Capture/Compare Timer
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