MC68HC705C9A_1 Datasheet, PDF (70/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification _{Timer I/O Registers}
8.4 Timer I/O Registers
The following I/O registers control and monitor timer operation:
• Timer control register (TCR)
• Timer status register (TSR)
• Timer registers (TRH and TRL)
• Alternate timer registers (ATRH and ATRL)
• Input capture registers (ICRH and ICRL)
• Output compare registers (OCRH and OCRL)
8.4.1 Timer Control Register (TCR)
The timer control register, shown in Figure 8-2, performs these
functions:
• Enables input capture interrupts
• Enables output compare interrupts
• Enables timer overflow interrupts
• Controls the active edge polarity of the TCAP signal
• Controls the active level of the TCMP output
$0012
Read:
Write:
Reset:
Bit 7
ICIE
0
6
5
OCIE TOIE
0
0
= Unimplemented
4
3
2
0
0
0
0
0
0
U = Undetermined
1
Bit 0
IEDG OLVL
U
0
Figure 8-2. Timer Control Register (TCR)
ICIE — Input Capture Interrupt Enable
This read/write bit enables interrupts caused by an active signal on
the TCAP pin. Resets clear the ICIE bit.
1 = Input capture interrupts enabled
0 = Input capture interrupts disabled
MC68HC705C9A — Rev. 2.0
Capture/Compare Timer
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