MC68HC705C9A_1 Datasheet, PDF (40/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification _{I/O Registers}
ADDR
$0010
$0011
$0012
$0013
$0014
$0015
$0016
$0017
$0018
$0019
$001A
$001B
$001C
$001D
$001E
$001F
REGISTER
SCSR
SCDR
TCR
TSR
ICRH
ICRL
OCRH
OCRL
TRH
TRL
ATRH
ATRL
EPR
C9A COPRST
(C9A Only)
C9A COPCR
(C9A Only)
RESERVED
ACCESS BIT 7
BIT 6
BIT 5
BIT 4
READ: TDRE
TC
RDRF IDLE
WRITE:
READ:
WRITE:
SCD7
SCD6
SCD5
SCD4
READ:
0
ICIE
OCIE
TOIE
WRITE:
READ:
ICF
OCF
TOF
0
WRITE:
READ: BIT15 BIT14 BIT13 BIT12
WRITE:
READ:
BIT7
BIT6
BIT5
BIT4
WRITE:
READ:
WRITE:
BIT15
BIT14
BIT13
BIT12
READ:
WRITE:
BIT7
BIT6
BIT5
BIT4
READ: BIT15 BIT14 BIT13 BIT12
WRITE:
READ:
BIT7
BIT6
BIT5
BIT4
WRITE:
READ: BIT15 BIT14 BIT13 BIT12
WRITE:
READ:
BIT7
BIT6
BIT5
BIT4
WRITE:
READ:
WRITE:
READ:
WRITE:
BIT7
BIT6
BIT5
BIT4
READ:
0
0
0
COPF
WRITE:
READ:
WRITE:
Figure 2-5. I/O Register Map
BIT 3
OR
BIT 2
NF
BIT 1
FE
SCD3 SCD2 SCD1
0
0
IEDG
0
0
0
BIT11 BIT10
BIT9
BIT3
BIT2
BIT1
BIT11 BIT10
BIT9
BIT3
BIT2
BIT1
BIT11 BIT10
BIT9
BIT3
BIT2
BIT1
BIT11 BIT10
BIT9
BIT3
BIT2
BIT1
LATCH
BIT3
BIT2
BIT1
CME COPE CM1
BIT 0
SCD0
OLVL
0
BIT8
BIT0
BIT8
BIT0
BIT8
BIT0
BIT8
BIT0
EPGM
BIT0
CM0
MC68HC705C9A — Rev. 2.0
Memory
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