MC68HC705C9A_1 Datasheet, PDF (144/157 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification _{Serial Peripheral Interface Timing}
SS
(INPUT)
SCK (CPOL = 0)
(INPUT)
SCK (CPOL = 1)
(INPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
1
4
2
5
8
SLAVE MSB OUT
6
7
MSB IN
13
5
4
12
BIT 6–1
10
11
BIT 6–1
12
3
13
SLAVE LSB OUT
11
LSB IN
9
NOTE
NOTE:
Not defined but normally MSB of character just received.
a) SPI Slave Timing (CPHA = 0)
SS
(INPUT)
SCK (CPOL = 0)
(INPUT)
SCK (CPOL = 1)
(INPUT)
8
MISO
(OUTPUT)
MOSI
(INPUT)
2
NOTE
1
5
4
5
4
10
SLAVE MSB OUT
6
7
MSB IN
13
12
BIT 6–1
10
11
BIT 6–1
12
3
13
9
SLAVE LSB OUT
LSB IN
NOTE:
Not defined but normally LSB of character previously transmitted.
a) SPI Slave Timing (CPHA = 1)
Figure 12-10. SPI Slave Timing Diagram
MC68HC705C9A — Rev. 2.0
Electrical Specifications
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