MC68HC908RK2 Datasheet, PDF (98/158 Pages) Motorola, Inc – Microcontroller Unit

Input/Output (I/O) Ports
9.2.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the eight port A pins.
Address:
Read:
Write:
Reset:
Alternate
Function:
$0000
Bit 7
PTA7
6
PTA6
KBD6
5
PTA5
KBD5
4
3
PTA4
PTA3
Unaffected by reset
KBD4
KBD3
2
PTA2
KBD2
1
PTA1
KBD1
Bit 0
PTA0
= Unimplemented
Figure 9-2. Port A Data Register (PTA)
PTA[7:0] — Port A Data Bits
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
KBD[6:1] — Keyboard Wakeup Pins
The keyboard interrupt enable bits, KBIE[6:1], in the keyboard interrupt control register enable the port
A pin as external interrupt pins and related internal pullup resistor. See Chapter 7 Keyboard/External
Interrupt Module (KBI).
NOTE
The enabling of a keyboard interrupt pin will overide the corresponding
definition of the pin in the data direction register. However, the data
direction register bit must be a 0 for software to read the pin.
9.2.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a 1
to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0004
Bit 7
6
5
4
3
2
1
DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1
0
0
0
0
0
0
0
Figure 9-3. Data Direction Register A (DDRA)
Bit 0
DDRA0
0
DDRA[7:0] — Data Direction Register A Bits
These read/write bits control port A data direction. Reset clears DDRA[7:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
NOTE
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
MC68HC908RK2 Data Sheet, Rev. 5.1
98
Freescale Semiconductor