MC68HC908RK2 Datasheet, PDF (141/158 Pages) Motorola, Inc – Microcontroller Unit

Monitor Module
12.3.1.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See Figure 12-6 and Figure 12-7.)
The data transmit and receive rate is determined by the crystal. Transmit and receive baud rates must be
identical.
START
BIT
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
Notes: 1 = Echo delay (2 bit times)
2 = Data return delay (2 bit times)
3 = Wait 1 bit time before sending next byte.
Figure 12-6. Monitor Data Format
STOP
BIT
NEXT
START
BIT
1, 2, 3
START
$A5
BIT
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
START
BREAK
BIT
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
Notes: 1 = Echo delay (2 bit times)
2 = Data return delay (2 bit times)
3 = Wait 1 bit time before sending next byte.
Figure 12-7. Sample Monitor Waveforms
STOP
BIT
NEXT
START
BIT
1, 2, 3
STOP
BIT
NEXT
START
BIT
1, 2, 3
12.3.1.3 Echoing
As shown in Figure 12-8, the monitor ROM immediately echoes each received byte back to the PTA0 pin
for error checking.
Any result of a command appears after the echo of the last byte of the command.
SENT TO
MONITOR
ECHO
READ
READ
ADDR. HIGH ADDR. HIGH ADDR. LOW ADDR. LOW
1
3
1
3
1
2
Notes: 1 = Echo delay (2 bit times)
2 = Data return delay (2 bit times)
3 = Wait 1 bit time before sending next byte.
DATA
RESULT
Figure 12-8. Read Transaction
12.3.1.4 Break Signal
A start bit followed by nine low bits is a break signal. (See Figure 12-9.) When the monitor receives a break
signal, it drives the PTA0 pin high for the duration of two bits before echoing the break signal.
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
141