MC68HC908RK2 Datasheet, PDF (122/158 Pages) Motorola, Inc – Microcontroller Unit

Timer Interface Module (TIM)
Addr.
$0024
$0025
$0026
$0027
$0028
$0029
$002A
Register Name
Timer Counter Modulo ^Read:
Register Low (TMODL) Write:
See page 130. _Reset:
Timer Channel 0 Status and ^Read:
Control Register (TSC0) Write:
See page 131. _Reset:
Timer Channel 0 Register ^Read:
High (TCH0H) Write:
See page 134. _Reset:
Timer Channel 0 Register ^Read:
Low (TCH0L) Write:
See page 134. _Reset:
Timer Channel 1 Status and ^Read:
Control Register (TSC1) Write:
See page 131. _Reset:
Timer Channel 1 Register ^Read:
High (TCH1H)) Write:
See page 134. _Reset:
Timer Channel 1 Register ^Read:
Low (TCH1L)) Write:
See page 134. _Reset:
Bit 7
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
6
6
1
CH0IE
0
14
5
5
1
MS0B
0
13
6
5
0
CH1IE
0
0
14
13
6
5
= Unimplemented
4
3
2
4
3
2
1
1
1
MS0A ELS0B ELS0A
0
0
0
12
11
10
Indeterminate after reset
4
3
2
Indeterminate after reset
MS1A ELS1B ELS1A
0
0
0
12
11
10
Indeterminate after reset
4
3
2
Indeterminate after reset
Figure 11-3. TIM I/O Register Summary (Continued)
1
Bit 0
1
Bit 0
1
1
TOV0 CH0MAX
0
0
9
Bit 8
1
Bit 0
TOV1 CH1MAX
0
0
9
Bit 8
1
Bit 0
11.4.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs or the TIM clock pin, TCLK. The
prescaler generates seven clock rates from the internal bus clock. The prescaler select bits, PS[2:0], in
the TIM status and control register select the TIM clock source.
11.4.2 Input Capture
With the input capture function, the TIM can capture the time at which an external event occurs. When an
active edge occurs on the pin of an input capture channel, the TIM latches the contents of the TIM counter
into the TIM channel registers, TCHxH and TCHxL. The polarity of the active edge is programmable. Input
captures can generate TIM CPU interrupt requests.
11.4.3 Output Compare
With the output compare function, the TIM can generate a periodic pulse with a programmable polarity,
duration, and frequency. When the counter reaches the value in the registers of an output compare
channel, the TIM can set, clear, or toggle the channel pin. Output compares can generate TIM CPU
interrupt requests.
MC68HC908RK2 Data Sheet, Rev. 5.1
122
Freescale Semiconductor