MC68HC908RK2 Datasheet, PDF (29/158 Pages) Motorola, Inc – Microcontroller Unit

FLASH 2TS Memory
2.5 FLASH 2TS Memory
This subsection describes the operation of the embedded FLASH 2TS memory. This memory can be
read, programmed, and erased from a single external supply. The program and erase operations are
enabled through the use of an internal charge pump.
The FLASH 2TS memory is appropriately named to describe its two-transistor source-select bit cell. The
FLASH 2TS memory is an array of 2031 bytes with an additional 14 bytes of user vectors and one byte
for block protection. An erased bit reads as a 0 and a programmed bit reads as a 1.
The address ranges for the user memory, control register, and vectors are:
• $7800–$7FEE, user space
• $7FEF, reserved — optional ICG TRIM value, see 6.7.3 ICG Trim Register
• $FFF0, block protect register
• $FE08, FLASH 2TS control register
• $FFF2–$FFFF, these locations are reserved for user-defined interrupt and reset vectors
This list is the row architecture for the user space array:
$7800–$7807 (Row 0)
$7808–$780F (Row 1)
$7810–$7817 (Row 2)
$7818–$781F (Row 3)
$7820–$7827 (Row 4)
--------------------------
$7FE8–$7FEF (Row 253)
Program and erase operations are facilitated through control bits in a memory mapped register. Details
for these operations appear later in this section. Memory in the FLASH 2TS array is organized into pages
within rows. For the 2-Kbyte array on the MC68HC908RK2, the page size is one byte. There are eight
pages (or eight bytes) per row. Programming operations are performed on a page basis, one byte at time.
Erase operations are performed on a block basis. The minimum block size is one row of eight bytes. Refer
to Table 2-3 for additional block size options.
NOTE
Sometimes a program disturb condition, in which case an erased bit on the
row being programmed unintentionally becomes programmed, occurs. The
embedded smart programming algorithm implements a margin read
technique to avoid program disturb. The margin read step of the smart
programming algorithm is used to ensure programmed bits are
programmed to sufficient margin for data retention over the device’s
lifetime. In the application code, perform an erase operation after eight
program operations (on the same row) to further avoid program disturb.
For availability of programming tools and more information, contact a local Freescale representative.
NOTE
A security feature prevents viewing of the FLASH 2TS contents.⁽¹⁾
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH 2TS difficult
for unauthorized users.
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
29